/* Configure PWM -- feq. 125KHz */
PLLCSR |= ((1<<PLLE) | (1<<LSM)); /* Enable PLL and Low Speed Mode peripheral clock -> 32MHz */
{
unsigned char counter;
/* Wait at least 100 us for PLL to stabilize */
for(counter = 0; counter < 250; counter++)
{
asm("nop"); /* Each NOP should take 500 ns -- MCU Clock at 2MHz */
}
}
while(bit_is_clear(PLLCSR,PLOCK)) ; /* Wait for PLL to lock (approx. 100ms) */
PLLCSR |= (1<<PCKE); /* Set PLL as PWM clock source */
OCR1C = 255; /* TOP value -- PWM with 256 bits of resolution */
TCCR1 |= ((1<<PWM1A) | (1<<COM1A1) | (1<<CS10)); /* PWM1A: Pulse Width Modulator A Enable */
/* OC1x cleared on compare match. Set when TCNT1 = $00. OC1x not connected and */
/* Asynchronous Clocking Mode - PCK */
/******************************************************************************/
/* Set the desired value of the duty_cycle on the PWM signal. */
/* duty_cycle_value with 255 equals to 100%. */
/******************************************************************************/
void set_duty_cycle_value(unsigned char duty_cycle_value)
{
/* Limit duty_cycle_value for safe function of the system */
if(duty_cycle_value >= ((255*MAX_DUTY_CYCLE_VALUE)/100))
{
duty_cycle_value = ((255*MAX_DUTY_CYCLE_VALUE)/100);
}
/* Output the duty_cycle_value to the respective control register */
OCR1A = duty_cycle_value;
}
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